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1 fn6153.5 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright ? inters il americas inc. 2007-2009, 2011. all rights reserved. intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. isl28136 5mhz, single precision rail-to-rail input-output (rrio) op amp the isl28136 is a low-power single operational amplifier optimized for single supply oper ation from 2.4v to 5.5v, allowing operation from one lithium cell or two ni-cd batteries. this device features a gain-bandwidth product of 5mhz and is unity-gain stable with a -3db bandwidth of 13mhz. this device features an inpu t range enhancement circuit (irec), which enables it to maintain cmrr performance for input voltages greater than the positive supply. the input signal is capable of swinging 0.25v above the positive supply and to the negative supply with only a slight degradation of the cmrr performance. the output operation is rail-to-rail. the part typically draws less than 1ma supply current while meeting excellent dc accuracy, ac performance, noise and output drive specifications. operation is guaranteed over -40c to +125c temperature range. features ? 5mhz gain bandwidth product @ a v = 100 ? 13mhz -3db unity gain bandwidth ? 900a typical supply current ? 150v maximum offset voltage (8 ld soic) ? 5na typical input bias current ? down to 2.4v single supply voltage range ? rail-to-rail input and output ? enable pin ? -40c to +125c operation ? pb-free (rohs compliant) applications ? low-end audio ? 4ma to 20ma current loops ? medical devices ? sensor amplifiers ? adc buffers ? dac output amplifiers pinouts ordering information part number (notes 2, 3) part marking package (pb-free) pkg. dwg. # ISL28136FHZ-T7 (note 1) gabp 6 ld sot-23 p6.064a ISL28136FHZ-T7a (note 1) gabp 6 ld sot-23 p6.064a isl28136fbz 28136 fbz 8 ld soic m8.15e isl28136fbz-t7 (note 1) 28136 fbz 8 ld soic m8.15e 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see device information page for isl28136 . for more information on msl please see techbrief tb363 . isl28136 (6 ld sot-23) top view isl28136 (8 ld soic) top view 1 2 3 6 4 5 +- out v- in+ v+ en in- 1 2 3 4 8 7 6 5 - + nc in- in+ en v+ out v- nc data sheet april 5, 2011
2 fn6153.5 april 5, 2011 absolute maxi mum ratings (t a = +25c) thermal information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75v supply turn-on voltage slew rate . . . . . . . . . . . . . . . . . . . . . 1v/s differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . v- - 0.5v to v+ + 0.5v esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300v thermal resistance ja (c/w) 6 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . 230 8 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 110 ambient operating temperature range . . . . . . . . .-40c to +125c storage temperature range . . . . . . . . . . . . . . . . . .-65c to +150c operating junction temperature . . . . . . . . . . . . . . . . . . . . . +125c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by c haracterization. parameter description conditions min (note 4) typ max (note 4) unit dc specifications v os input offset voltage 8 ld soic -150 -270 10 150 270 v 6 ld sot-23 -400 -450 10 400 450 v input offset voltage vs temperature 0.4 v/c i os input offset current t a = -40c to +85c -10 -15 010 15 na i b input bias current t a = -40c to +85c -35 -40 535 40 na v cm common-mode voltage range guaranteed by cmrr 0 5 v cmrr common-mode rejection ratio v cm = 0v to 5v 90 85 114 db psrr power supply rejection ratio v + = 2.4v to 5.5v 90 85 99 db a vol large signal voltage gain v o = 0.5v to 4v, r l = 100k to v cm 600 500 1770 v/mv v o = 0.5v to 4v, r l = 1k to v cm 140 v/mv v out maximum output voltage swing output low, r l = 100k to v cm 36 10 mv output low, r l = 1k to v cm 70 90 110 mv output high, r l = 100k to v cm 4.99 4.98 4.994 v output high, r l = 1k to v cm 4.92 4.89 4.94 v i s,on supply current, enabled per amp 0.8 0.9 1.1 1.4 ma i s,off supply current, disabled 10 14 16 a i o + short-circuit output source current r l = 10 to v cm 48 45 56 ma t --------------- - isl28136
3 fn6153.5 april 5, 2011 i o - short-circuit output sink current r l = 10 to v cm 50 45 55 ma v supply supply operating range v + to v - 2.4 5.5 v v en h en pin high level 2 v v en l en pin low level 0.8 v i en h en pin input high current v en = v + 11.5 1.6 a i en l en pin input low current v en = v - 16 25 30 na ac specifications gbw gain bandwidth product a v = 100, r f = 100k , r g = 1k to v cm 5mhz unity gain bandwidth -3db bandwidth a v = 1, r f = 0 , r l = 10k to v cm , v out = 10mv p-p 13 mhz e n input noise voltage peak-to-peak f = 0.1hz to 10hz, r l = 10k to v cm 0.4 v p-p input noise voltage density f o = 1khz, r l = 10k to v cm 15 nv/ hz i n input noise current density f o = 10khz, r l = 10k to v cm 0.35 pa/ hz cmrr input common mode rejection ratio f o = to 120hz; v cm = 1v p-p , r l = 1k to v cm -90 db psrr+ to 120hz power supply rejection ratio (v + )v + , v - = 1.2v and 2.5v, v source = 1v p-p , r l = 1k to v cm -88 db psrr- to 120hz power supply rejection ratio (v - )v + , v - = 1.2v and 2.5v v source = 1v p-p , r l = 1k to v cm -105 db transient response sr slew rate v out = 1.5v; r f = 50k , r g = 50k to v cm 1.9 v/s t r , t f , large signal rise time, 10% to 90%, v out a v = +2, v out = 2v p-p , r g = r f = r l = 1k to v cm 0.6 s fall time, 90% to 10%, v out a v = +2, v out = 2v p-p , r g = r f = r l = 1k to v cm 0.5 s t r , t f , small signal rise time, 10% to 90%, v out a v = +2, v out = 10mv p-p , r g = r f = r l = 1k to v cm 65 ns fall time, 90% to 10%, v out a v = +2, v out = 10mv p-p , r g = r f = r l = 1k to v cm 62 ns t en enable to output turn-on delay time, 10% en to 10% v out v en = 5v to 0v, a v = +2, r g = r f = r l = 1k to v cm 5s enable to output turn-off delay time, 10% en to 10% v out v en = 0v to 5v, a v = +2, r g = r f = r l = 1k to v cm 0.3 s note: 4. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by c haracterization. (continued) parameter description conditions min (note 4) typ max (note 4) unit isl28136
4 fn6153.5 april 5, 2011 typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open figure 1. gain vs frequency vs feedback resistor values r f /r g figure 2. gain vs frequency vs v out, r l = 1k figure 3. gain vs frequency vs v out , r l = 10k figure 4. gain vs frequency vs v out , r l = 100k figure 5. gain vs frequency vs r l figure 6. frequency resp onse vs closed loop gain -15 -10 -5 0 5 10 15 100 1k 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) r f = r g = 100k r f = r g = 1k r f = r g = 10k v + = 5v r l = 1k a v = +2 v out = 10mv p-p c l = 16.3pf -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v v + = 5v r l = 1k a v = +1 v out = 10mv p-p c l = 16.3pf -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) v + = 5v r l = 10k a v = +1 v out = 10mv p-p c l = 16.3pf normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) v out = 100mv v out = 10mv v out = 50mv v out = 1v v + = 5v r l = 100k a v = +1 v out = 10mv p-p c l = 16.3pf r l = 10k r l = 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) r l = 100k v + = 5v a v = +1 v out = 10mv p-p c l = 16.3pf -10 0 10 20 30 40 50 60 70 100 1k 10k 100k 1m 10m 100m frequency (hz) a v = 1 a v = 10 a v = 101 a v = 1001 v + = 5v v out = 10mv p-p c l = 16.3pf r l = 10k 100 1k 10k 100k 1m 10m 100m frequency (hz) gain (db) a v = 1001, r g = 1k, r f = 1m a v = 10, r g = 1k, r f = 9.09k a v = 1, r g = inf, r f = 0 a v = 101, r g = 1k, r f = 100k isl28136
5 fn6153.5 april 5, 2011 figure 7. gain vs frequency vs supply vo ltage figure 8. gain vs frequency vs c l figure 9. cmrr vs frequency; v + = 2.4v and 5v figure 10. psrr vs frequency, v + , v - = 1.2v figure 11. psrr vs frequency, v + , v - = 2.5v figure 12. input voltage noise density vs frequency typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) r l = 10k a v = +1 v out = 10mv p-p c l = 16.3pf v + = 5v v + = 2.4v -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 c l = 51.7pf c l = 43.7pf c l = 37.7pf c l = 26.7pf c l = 16.7pf c l = 4.7pf 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) v + = 5v r l = 1k a v = +1 v out = 10mv p-p -100 -80 -60 -40 -20 0 20 cmrr (db) v + = 2.4v, 5v r l = 1k a v = +1 v cm = 1v p-p c l = 16.3pf 100 1k 10k 100k 1m 10m frequency (hz) 10 -120 -100 -80 -60 -40 -20 0 20 psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 psrr- psrr+ v + , v - = 1.2v r l = 1k a v = +1 v source = 1v p-p c l = 16.3pf psrr- psrr+ v + , v - = 2.5v r l = 1k a v = +1 v source = 1v p-p c l = 16.3pf -120 -100 -80 -60 -40 -20 0 20 psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 10 100 1 10 100 1k 10k 100k frequency (hz) input voltage noise (nv hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf isl28136
6 fn6153.5 april 5, 2011 figure 13. input current noise density vs freque ncy figure 14. input voltage noise 0.1hz to 10hz figure 15. large signal step respons e figure 16. small signal step response figure 17. enable to output response figu re 18. input offset voltage vs common-mode input voltage typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) 0.1 1 10 1 10 100 1k 10k 100k frequency (hz) input current noise (pa hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 012345678910 time (s) input noise (v) v + = 5v r l = 10k r g = 10, r f = 100k a v = 10000 c l = 16.3pf -1.5 -1.0 -0.5 0 0.5 1.0 1.5 012345678910 time (s) large signal (v) v + , v - = 2.5v r l = 1k r g = r f = 10k a v = 2 c l = 16.3pf v out = 1.5v p-p 0.012 0.014 0.016 0.018 0.020 0.022 0.024 0.026 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 time (s) small signal (v) v + , v - = 2.5v r l = 1k r g = r f = 10k a v = 2 c l = 16.3pf v out = 10mv p-p -1 0 1 2 3 4 5 6 0 102030405060708090100 time (s) v-enable (v) -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 output (v) v + = 5v r g = r f = r l = 1k a v = +2 v out = 1v p-p c l = 16.3pf v-enable v-out -100 -80 -60 -40 -20 0 20 40 60 80 100 -10123456 v cm (v) v os (v) v + = 5v r l = open a v = +1000 r f = 100k, r g = 100 isl28136
7 fn6153.5 april 5, 2011 figure 19. input offset current vs common-mode input voltage figure 20. supply current enabled vs temperature, v +, v - = 2.5v figure 21. supply current disabled vs temperature, v +, v - = 2.5v figure 22. v os vs temperature, v +, v - = 2.5v, sot package figure 23. v os vs temperature, v +, v - = 2.5v, soic package figure 24. v os vs temperature, v +, v - = 1.2v, sot package typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -100 -80 -60 -40 -20 0 20 40 60 80 100 -10123456 v cm (v) i-bias (na) v + = 5v r l = open a v = +1000 r f = 100k, r g = 100 600 700 800 900 1000 1100 1200 -40 -20 0 20 40 60 80 100 120 temperature (c) current (a) min median max n = 1150 4 5 6 7 8 9 10 11 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 current (a) -400 -300 -200 -100 0 100 200 300 400 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 v os (v) -250 -200 -150 -100 -50 0 50 100 150 200 250 300 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 v os (v) -400 -300 -200 -100 0 100 200 300 400 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 v os (v) isl28136
8 fn6153.5 april 5, 2011 figure 25. v os vs temperature, v +, v - = 1.2vsoic package figure 26. , i bias + vs temperature, v +, v - = 2.5v figure 27. i bias - vs temperature, v +, v - = 2.5v figure 28. i bias + vs temperature, v +, v - = 1.2v figure 29. i bias - vs temperature, v +, v - = 1.2v figure 30. i os vs temperature, v +, v - = 2.5v typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -250 -200 -150 -100 -50 0 50 100 150 200 250 300 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 min v os (v) -10 -5 0 5 10 15 20 25 30 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 i bias + (na) -10 -5 0 5 10 15 20 25 30 -40-200 20406080100120 temperature (c) i bias - (na) min median max n = 1150 -25 -20 -15 -10 -5 0 5 10 15 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 i bias + (na) -25 -20 -15 -10 -5 0 5 10 15 20 -40-200 20406080100120 temperature (c) min median max n = 1150 i bias - (na) -8 -6 -4 -2 0 2 4 6 8 10 -40-200 20406080100120 temperature (c) i os (na) min median max n = 1150 isl28136
9 fn6153.5 april 5, 2011 figure 31. i os vs temperature, v +, v - = 1.2v figure 32. cmrr vs temperature, v cm = -2.5v to +2.5v, v +, v - = 2.5v figure 33. psrr vs temperature, v +, v - = 1.2v to 2.75v figure 34. avol vs temperature, v +, v - = 2.5v, v o = -2v to +2v, r l = 100k figure 35. avol vs temperature, v +, v - = 2.5v, v o = -2v to +2v, r l = 1k figure 36. v out high vs temperature, v +, v - = 2.5v, r l =1k typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) -8 -6 -4 -2 0 2 4 6 8 10 12 -40 -20 0 20 40 60 80 100 120 temperature (c) i os (na) min median max n = 1150 90 95 100 105 110 115 120 125 130 135 140 -40 -20 0 20 40 60 80 100 120 temperature (c) cmrr (db) min median max n = 1150 90 95 100 105 110 115 120 -40 -20 0 20 40 60 80 100 120 temperature (c) min median max n = 1150 psrr (db) 0 500 1000 1500 2000 2500 3000 3500 4000 4500 -40 -20 0 20 40 60 80 100 120 temperature (c) avol (v/mv) min median max n = 1150 60 80 100 120 140 160 180 200 -40 -20 0 20 40 60 80 100 120 temperature (c) avol (v/mv) min median max n = 1150 4.930 4.935 4.940 4.945 4.950 4.955 4.960 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (v) min median max n = 1150 isl28136
10 fn6153.5 april 5, 2011 figure 37. v out low vs temperature, v +, v - = 2.5v, r l =1k pin descriptions isl28136 (6 ld sot-23) isl28136 (8 ld soic) pin name function equivalent circuit 1, 5 nc not connected 4 2 in- inverting input circuit 1 3 3 in+ non-inverting input see circuit 1 2 4 v- negative supply circuit 2 1 6 out output circuit 3 6 7 v+ positive supply see circuit 2 58en chip enable circuit 3 typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open (continued) 45 50 55 60 65 70 75 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (m v) min max median n = 1150 in+ in- v+ v- v+ v- capacitively coupled esd clamp v+ v- out logic pin v+ v- isl28136
11 fn6153.5 april 5, 2011 applications information introduction the isl28136 is a single channel bi-cmos rail-to-rail input, output (rrio) micropower precis ion operational amplifier. the part is designed to operate from a single supply 2.4v to 5.5v. the part has an input common mode range that extends 0.25v above the posit ive rail and down to the negative supply rail. the outpu t operation can swing within about 3mv of the supply rails with a 100k load. rail-to-rail input many rail-to-rail input stages us e two differential input pairs; a long-tail pnp (or pfet) and an npn (or nfet). severe penalties have to be paid for this circuit topology. as the input signal moves from one supply rail to another, the operational amplifier switches from one in put pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. the isl28136 achieves input ra il-to-rail operation without sacrificing important precision specifications and degrading distortion performance. the de vice?s input offset voltage exhibits a smooth behavior throughout the entire common- mode input range. the input bias current versus the common-mode voltage range gives an undistorted behavior from typically down to the negative rail to 0.25v higher than the positive rail. rail-to-rail output the output stage uses drai n-connected n and p-channel mosfets to achieve rail-to-rail output swing. the p-channel device sources current to s wing the output in the positive direction and the n-channel sink s current to swing the output in the negative direction. the isl28136 with a 100k load will swing to within 3mv of the pos itive supply rail and within 3mv of the negative supply rail. results of over-driving the output caution should be used when over-driving the output for long periods of time. over-driving the output can occur in two ways. 1) the input voltage times the gain of the amplifier exceeds the supply voltage by a large value or, 2) the output current required is higher than the out put stage can deliver. these conditions can result in a shift in the input offset voltage (v os ) as much as 1v/hr. of exposure under these conditions. in+ and in- input protection all input terminals have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. they also contain back-to-back diodes across the input terminals (see ?pin descriptions? on page 10 - circuit 1 ) . for applications where the input differential voltage is expected to exceed 0.5v, an external series resistor mu st be used to ensure the input currents never exceed 5ma (figure 38). enable/disable feature the isl28136 offers an en pin that disables the device when pulled up to at least 2.0v. in the disabled state (output in a high impedance state), the part consumes typically 10a at room temperature. by di sabling the part, multiple isl28136 parts can be connected together as a mux. in this configuration, the outputs are tied together in parallel and a channel can be selected by the en pin. the loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amp lifier outputs are connected together. note that feed through from the in+ to in- pins occurs on any mux amp disabled channel where the input differential voltage exceeds 0.5v (e.g., active channel v out = 1v, while disabled channel v in = gnd), so the mux implementation is best suited for small signal applications. if large signals are required, use series in+ resistors, or a large value r f , to keep the feed through current low enough to minimize the impact on the active channel. see?limitations of the differ ential input protection? on page 11 for more details. to disable the part, the user needs to supply the 1.5a required to pull the en pin to the v + rail. if left open, the en pin will pull to the negative rail and the device will be enabled by default. if the en function is not required (no need to turn the part off), as a precaution, it is recommended that the user tie the en pin to the v - pin. limitations of the differential input protection if the input differential voltage is expected to exceed 0.5v, an external current limiting resistor must be used to ensure the input current never exceeds 5ma. for non-inverting unity gain applications, the current limiting can be via a series in+ resistor, or via a feedback resistor of appropriate value. for other gain configurations, the series in+ resi stor is the best choice, unless the feedback (r f ) and gain setting (r g ) resistors are both sufficiently large to limit the input current to 5ma. large differential input voltages can arise from several sources: 1) during open loop (comparator) operation. used this way, the in+ and in- voltages don?t track, so differentials arise. 2) when the amplifier is disabled but an input signal is still present. an r l or r g to gnd keeps the in- at gnd, while the varying in+ signal creates a differential voltage. mux amp applications are similar, except that the active channel v out determines the voltage on the in- terminal. figure 38. input current limiting - + r in r l v in v out isl28136
12 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6153.5 april 5, 2011 3) when the slew rate of the input pulse is considerably faster than the op amp?s slew rate. if the v out can?t keep up with the in+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. to avoid this issue, keep the input slew rate below 1.9v/s, or use appropriate current limiting resistors. large (>2v) differential input voltages can also cause an increase in disabled i cc . current limiting these devices have no internal current-limiting circuitry. if the output is shorted, it is possible to exceed the absolute maximum rating for output current or power dissipation, potentially resulting in the destruction of the device. power dissipation it is possible to exceed the +125c maximum junction temperatures under certain load and power-supply conditions. it is therefore important to calculate the maximum junction temperature (t jmax ) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. these paramete rs are related in equation 1: where: ?p dmaxtotal is the sum of the maximum power dissipation of each amplifier in the package (pd max ) ?pd max for each amplifier can be calculated using equation 2: where: ?t max = maximum ambient temperature ? ja = thermal resistance of the package ?pd max = maximum power dissipation of 1 amplifier ?v s = supply voltage (magnitude of v + and v - ) ?i max = maximum supply current of 1 amplifier ?v outmax = maximum output voltage swing of the application ?r l = load resistance t jmax t max ja xpd maxtotal () + = (eq. 1) pd max 2*v s i smax v s ( - v outmax ) v outmax r l ---------------------------- + = (eq. 2) isl28136
13 fn6153.5 april 5, 2011 isl28136 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise specified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view ?a typical recommended land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view ?b?
14 fn6153.5 april 5, 2011 isl28136 package outline drawing p6.064a 6 lead small outline transistor plastic package rev 0, 2/10 1.60 0.08-0.20 see detail x (0.60) 0-3 3 5 detail "x" side view typical recommended land pattern top view end view index area pin 1 seating plane gauge 0.450.1 (2 plcs) 10 typ 4 1.90 0.40 0.05 2.90 0.95 2.80 0.05-0.15 1.14 0.15 0.20 c a-b d m (1.20) (0.60) (0.95) (2.40) 0.10 c 1.45 max c b a d 3 3 0.20 c (1.90) 2x 0.15 c 2x d 0.15 c 2x a-b (0.25) h 64 5 5 13 2 plane dimension is exclusive of mold flash, protrusions or gate burrs. this dimension is measured at datum ?h?. package conforms to jedec mo-178aa. foot length is measured at reference to guage plane. dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. 3. 5. 4. 2. dimensions are in millimeters. 1. notes:

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